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IDD Test

IDD Test This post is only available in English. Power supply current (IDD) indicates the current flows from Drain to Drain in a CMOS circuit (named ICC in TTL circuit, means Collector to Collector). IDD can be equivalent as: Static IDD Test Static IDD is a measurement of current from DUT's VDD pin, when the DUT is in static state (the DUT is not active during the test). The value of static IDD indicates the lowest current consumption of the DUT, which is important for battery operated devices, also help to indicate marginal defects. Test Method Static IDD test is performed with applying a voltage of VDDmax and measuring the current value, while the DUT is preconditioned to its lowest current consumption logic state. Apply VDDmax to VDD pin (with current clamp). Precondition DUT to its lowest current consumption logic state. Measure the current flowing into VDD pin: Higher than spec value(>10uA): FAIL Lower than spec value(<10uA): PASS Dynamic IDD Test Dynamic IDD is a measurement of current from DUT's VDD pin, when the DUT is constantly performing some function. Dynamic IDD is also important for battery operated devices. Test Method Static IDD test is performed with applying a voltage of VDDmax and measuring the current value, while the DUT is preconditioned to a continuously working state. Apply VDDmax to VDD pin (with current clamp). Precondition DUT to a continuously working state. Measure the current flowing into VDD pin: Higher than spec value(>50mA): FAIL Lower than spec value(<50mA): PASS Quiescent IDD Test (IDDQ) Quiescent IDD is a measurement of IDD in the quiescent states (the circuit is not switching and inputs are held at static values). As processors shrink , the defect of leakage current becomes much more higher, and IDDQ test may detect minor defects within the core of the circuit that could not other wise be detected. Test Method Apply VDDmax to VDD pin (with current clamp). Precondition DUT to a certain working state (toggle certain function part to on/off such as Bluetooth and Wi-Fi). Measure the current flowing into VDD pin: Higher than spec value: FAIL Lower than spec value: PASS Repeat to test with different working states. References & Acknowledgements The Fundamentals Of Digital Semiconductor Testing Fundamentals of Testing Using ATE Original: https://wiki-power.com/ This post is protected by CC BY-NC-SA 4.0 agreement, should be reproduced with attribution.

IDD测试是衡量CMOS电路中从漏极到漏极的电流流动的指标。静态IDD测试是在DUT处于静态状态时测量从VDD引脚流出的电流。动态IDD测试是在DUT不断执行某些功能时测量从VDD引脚流出的电流。静态IDDQ测试是在静态状态下测量IDD,用于检测电路核心中的小缺陷。测试方法包括施加VDDmax电压并测量电流值。

CMOS电路 IDD测试 动态IDD测试 静态IDDQ测试 静态IDD测试

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